Cover

2.3 Address Decode

2.1 Constraints File

3.6 Address Multiplexer

Contents

2.4 Dot Clock

2.2 Wolrd View

3.7 Keyboard

Figures

2.5 Horizontal Counter

3 Vertical - LCA

3.8 Date Bus

1.1 Address Map

2.6 Horizontal Maximum

3.1 Block Diagram

3.9 Sync Register

1.2 vRAM Organization

2.7 Horizontal Sync Start

3.2 vRAM Timing

3.10 Interrupts

2 Horizontal - LCA

2.8 Horizontal Sync End

3.3 DMA Timing

3.1 Constraints File

2.1 Block Diagram

2.9 Video Output

3.4 Vertical Counter

3.2 World View

2.2 Data Bus

2.10 Output Port

3.5 Address Generator